Rambus Expands Portfolio of DDR5 Memory Interface Chips for Data Centers

Rambus

The Rambus SPD (Serial Presence Detect) Hub and Temperature Sensor have been added to Rambus’s lineup of DDR5 memory interface chips, joining the company’s Rambus Registering Clock Driver (RCD). DDR5 uses a new module architecture with an expanded chipset to increase memory bandwidth and capacity.

“DDR5 provides a significant increase in performance for computing systems,” said Shane Rau, Research Vice President, Computing Semiconductors at IDC. “However, DDR5 memory modules require new components to function, components like SPD hubs and temperature sensors are important components for client and server systems.”

The DDR5 Dual Inline Memory Module (DIMM) system management and thermal control are improved by the SPD Hub and Temperature Sensors, enabling higher performance within the desired power envelope for servers.

“The new performance levels of DDR5 memory place an increased premium on signal integrity and thermal management for server and client DIMMs,” said Sean Fan, Chief Operating Officer (COO) at Rambus. “With over 30 years of memory subsystem design experience, Rambus is ideally positioned to deliver DDR5 chipset solutions which enable breakthrough bandwidth and capacity for advanced computing systems.”

DDR5 Computing Systems

Sean Fan, CCO at Rambus
“The new performance levels of DDR5 memory place an increased premium on signal integrity and thermal management for server and client DIMMs,” said Sean Fan, CCO at Rambus.

The SPD Hub and Temperature Sensor work with the RCD to enable high-performance, high-capacity memory solutions for DDR5 computing systems as a component of the Rambus server and client DDR5 memory interface chipsets.

On a memory module, both the SPD Hub and Temperature Sensor would play crucial roles in sensing and reporting vital information for system setup and thermal control. The temperature sensor is intended for server RDIMMs, while the SPD Hub is utilized in both server and client modules, including RDIMMs, UDIMMS, and SODIMMS.

“The strong collaboration between Intel and SPD ecosystem partners like Rambus, delivers critical chip solutions for Intel’s next generation DDR5-based systems, scaling server performance to new levels,” said Dr. Dimitrios Ziakas, Vice President of Memory and IO Technologies at Intel. “Our joint efforts to advance DDR5-based computing systems is setting the stage for Intel’s DDR5 advance over multiple generations and the next level of performance for data centers.”

Key features of the SPD Hub (SPD5118) would include:

  • I2C and I3C bus serial interface support
  • Advanced reliability features
  • Expanded NVM space for customer-specific applications
  • Low latency for fastest I3C bus rates
  • Integrated temperature sensor
  • Meets or exceeds all JEDEC DDR5 SPD Hub operational requirements (JESD300-5A)

Key features of the Temperature Sensor (TS5110) would include:

  • Precision thermal sensing
  • I2C and I3C bus serial interface support
  • Low latency for fastest I3C bus rates
  • Meets or exceeds all JEDEC DDR5 Temperature Sensor operational requirements (JESD302-1.01)

Both the Temperature Sensor and the Rambus SPD Hub are currently available.