Rambus Unveils PCIe 6.0 Controller for Next-Gen Data Center Environments

Rambus

Rambus, a chip and silicon IP vendor, has announced the release of its PCI Express (PCIe) 6.0 Controller. PCIe is the connection of choice across a wide range of data-intensive applications, including data centers, AI/ML, HPC, automotive, and IoT.

The Rambus PCIe 6.0 controller, which has been optimized for power, space, and latency, would provide data speeds of up to 64 Gigatransfers per second (GT/s) for high-performance applications.

Furthermore, the controller would offer cutting-edge security with an Integrity and Data Encryption (IDE) engine that monitors and protects PCIe lines from physical threats.

AI/ML and Data-intensive Workloads

Photo Sean Fan, COO at Rambus
“The rapid advancement of AI/ML and data-intensive workloads requires that we continue to provide higher data rate solutions with best-in-class latency, power and area,” said Sean Fan, COO at Rambus.

“The rapid advancement of AI/ML and data-intensive workloads requires that we continue to provide higher data rate solutions with best-in-class latency, power and area,” said Sean Fan, Chief Operating Officer (COO) at Rambus. “As the latest addition to our portfolio of industry-leading interface IP, our PCIe 6.0 Controller offers customers an easy to integrate solution that delivers both performance and security for advanced SoCs and FPGAs.”

To sum up, the Rambus PCIe 6.0 Controller would offer the following key features:

  • Supports PCIe 6.0 specifications, including a data throughput of 64 GT/s and PAM4 signaling
  • Supports fixed-sized FLITs for high-bandwidth efficiency
  • For link robustness, low-latency Forward Error Correction (FEC) is used
  • Internal data route size (256, 512, 1024 bits) automatically adjusts up or down dependent on maximum link speed and width for decreased gate count and optimal throughput
  • PCIe 5.0, 4.0, and 3.0/3.1 backward compatibility
  • Endpoint, Root-Port, Dual-Mode, and Switch port configurations are all supported
  • Performance-optimized integrated IDE